The present invention relates to a single electron tunneling transistor having a multi-layer structure.
FIG. 1 shows a crystal structure of a copper oxide superconductor Bi2Sr2CaCu2Oy.
As shown in FIG. 1, the crystal structure of Bi2Sr2CaCu2Oy is formed of a plurality of electrically conductive layers (CuO2) 1 and a plurality of tunneling barrier layers (BiO) 2, which are alternately stacked one on another. The thickness t of the electrically conductive layer 1 is 3 xc3x85, and the thickness of the tunneling barrier layer 2; namely, the lattice interval d, is 12 xc3x85. FIG. 2 shows an electrode model of this structure.
In the model, the capacitance C between electrodes A and B is expressed by the following equation:
C=xcex50s/dNxe2x80x83xe2x80x83(1)
where xcex5 is dielectric constant.
The tunneling resistance R between electrodes A and B is expressed by the following equation:
R=Nxcfx810(d/s)xe2x80x83xe2x80x83(2)
where xcfx810 is specific resistance.
An element having a structure as described above exhibits a single electron tunneling effect if and when the energy gain 4e2/C of an electric charge 2e of superconducting electrons moving from the electrode A to the electrode B is sufficiently greater than the thermal noise energy kBT (k: Boltzmann""s constant).
This relation is expressed by the following.
2e2/C greater than kBTxe2x80x83xe2x80x83(3)
In accordance with the above expressions (1) and (3), in order to obtain a single electron tunneling effect, the number N of the layers must satisfy the following relation.
N greater than (xcex5s/d)(kT/2e2)xe2x80x83xe2x80x83(4)
In fact, when a square element of 1 xcexcmxc3x971 xcexcm is made from a Bi2Sr2CaCu2Oy single crystal and placed in liquid helium having a temperature of 4 K, single electron tunneling effect can be observed for any number N greater than 50 (N greater than 50), and this number corresponds to a thickness which can be attained without difficulty. Another condition for obtaining a single electron tunneling effect is that the tunneling resistance R of the element must be greater than the quantum resistance R0 represented by the following equation.
R0=h/4e2=6kxcexa9xe2x80x83xe2x80x83(5)
Therefore,
R greater than h/4e2.xe2x80x83xe2x80x83(6)
From the above expressions (2) and (6),
N greater than (s/xcfx810d)xc2x7(h/4e2).xe2x80x83xe2x80x83(7)
Again, N greater than 50 holds. Manufacturing a 1 xcexcmxc3x971 xcexcm square element of N=50 (i.e., 50 layers) is very easy as compared to the conventional case in which N=1 and the area s of the element is smaller than a square of 1 xcexcmxc3x971 xcexcm.
FIG. 3 shows a conventional single electron tunneling element having a single tunneling barrier layer.
From relation (4), the condition under which this single electron tunneling element exhibits the single electron tunneling effect is:
N=1 greater than (xcex5s/d)xc2x7(kT/2e2)xe2x80x83xe2x80x83(8)
From relation (7), the following relation holds:
N=1 greater than (s/xcfx810d)(h/4e2)xe2x80x83xe2x80x83(9)
Thus, in the conventional case shown in FIG. 3, s must be made smaller, by a factor of at least 2, to thereby attain (0.1)2 xcexcm2.
However, in a single electron tunneling element including the aforementioned tunneling barrier layer, difficulty is still encountered in realizing a single electron tunneling element processing method having a processing accuracy of not greater than 0.1 xcexcm.
In view of the foregoing, an object of the present invention is to provide a single electron tunneling transistor having a multi-layer structure exhibiting the single electron tunneling effect even at a processing accuracy of not less than 0.1 xcexcm.
In order to attain the above-mentioned object, the present invention provides the following.
[1] A single electron tunneling transistor having a multi-layer structure, Comprising a plurality of electrically conductive layers and a plurality of tunneling barrier layers, the conductive layers and the tunneling barrier layers being alternately stacked one on another, and a control gate, the total number of the conductive layers and the tunneling barrier layers being at least 50, and a minute tunneling junction in the structure having an area on the order of 1 xcexcm square, wherein the control gate is formed at a central portion of the single electron tunneling transistor, a first and a second pair of grooves (a-2, a-1) and (a-3, a-4) being provided for centering the control gate, the grooves of each pair opening toward opposite directions, so as to permit an electric field to be applied to tunneling element electrodes existing at the bottom portions of the grooves (a-2) and (a-3).
[2] A single electron tunneling transistor having a multi-layer structure, comprising a plurality of electrically conductive layers and a plurality of tunneling barrier layers, the conductive layers and the tunneling barrier layers being alternately stacked one on another, and a control gate, the total number of the conductive layers and the tunneling barrier layers being at least 50, and a minute tunneling junction in the structure having an area on the order of 1 xcexcm square.
[3] A single electron tunneling transistor having a multi-layer structure as described in [2], wherein the control gate is formed at a central portion of the single electron tunneling transistor, a first and a second pairs of grooves (a-2, a-1) and (a-3, a-4) being provided centering the control gate, the grooves of each pair opening toward opposite directions, so as to permit an electric field to be applied to tunneling element electrodes existing at bottom portions of the grooves (a-2) and (a-3) provided centering the control gate G.